Testing DRAM is very complex, and difficult to get right. Each mem write has to be verified to go to one and only one location. It has to check for stuck bits, crossed lines, shorted lines, and failed refresh. And also has to deal with the CPU caches (simply marking the sections as "non-cachable" doesn't seem to be enough..).

Even the code I have there now was difficult to get working, and I'm still not sure if it has successfully defeated the various caching mechanisms completely.

So, in short, I could produce a special memtest kernel if someone else provides the working code. Otherwise, it's a tough nut to crack.